The Apple IIgs DSP card Preliminary Information By Charles T. 'Dr. Tom' Turley The following information is to be considered only preliminary. It is provided by the OSRL R & D Projects Coordinator and developer. Preliminary info on the OSRL GS/DSP Background Prototype GS/DSP boards, cards and IIgs software (with src. codes) for same, have been obtained and are now under new R & D design updates and improvements. When I first became aware of the Motorola DSP56001, it became obvious to me that a card utilizing it on the IIgs just HAD to be made. The two main reasons for updates and improvements were; (1) as a labor of love and (2) for making available a formally unheard of amount of processing power for use by select IIgs users, for as little as possible - cost wise, without making any profits. The goal is to make the GS/DSP board available by special order for use by select IIgs users only for under $300. What is a DSP? The DSP, or Digital Signal Processor is a fairly new class of processor that is optimized for performing extremely complex high-speed numeric processing. Just picture a very high-speed CPU coupled with a conventional math co-processor such as the 68882, or the 80387 gone totally mad! The Motorola DSP65001 for the card is used because it is packed with power and powerful features, has a VERY nice assembly language, and is quite very low in cost. Features of the Motorola DSP56001... Speed: 10.25 million instructions per second (mips) at a clock speed of 20.5 Mhz; 27 and 33.33 mhz versions will be available in the near future for ratings of 13.5 and 16.65 mips, respectively. By contrast, a Macintosh IIfx is generally rated at 6 mips, while a stock GS is rated at .35 mips. Busses: The 56001 architecture is divided into three independent 16 bit address spaces, one for program storage and two separate data spaces. Data buses are all 24 bits wide. Parallelism: The data arithmetic logic units (ALU's), address ALU's, and program controller operate in parallel so that an instruction prefetch, a 24 x 24 bit multiplication, a 56 bit addition, two data moves, and two address pointer updates using one of three types of arithmetic (linear, modulo, or reverse carry) can be executed in a single instruction cycle. This parallelism allows a four coefficient Infinite Impulse Response (IIR) filter section to be executed in only four cycles -- the theoretical minimum for a single multiplier architecture. Precision: The 24 bit data paths allow for signal processing with 144dB of dynamic range; intermediate results held in the 56 bit accumulators can range over 336dB. Integration: In addition to the three independent execution units, the DSP56001 has six on-board memories (512 bytes by 24 bits of program RAM, 256 bytes each of 24 bit X and Y data RAM, 24 bit sine/cosine table, positive Mu-law and A-law expansion tables, and bootstrap ROM), three on-chip MCU style peripherals (serial communication interface), a clock generator, and seven buses (four data and three address), making the overall system very compact, low power, and inexpensive. Instruction set: The 62 instruction mnemonics are MCU-like, making programming the 56001 VERY easy. The orthogonal syntax supports control of the parallel execution units. The no-overhead DO instruction and the REP (repeat) instruction make writing straightline code a thing of the past. Chip fabrication: HCMOS for low power consumption. FEATURES of the GS/DSP card The GS/DSP is a fairly small piggyback mounted board that plugs into the 65C816 socket on the GS motherboard extending forward and to the left (under the power supply). The '816 or cable from an accelerator then plugs into a socket on the GS/DSP. The board does not interfere with the operation of an accelerator in any way. Plugging the directly into the processor socket has a couple major advantages over using a slot-card based design: 1. The board does not take up a slot. 2. Because the DSP has direct access the buses and control signals, it will be capable of transferring data to and from the GS's RAM using processor-direct DMA at 2.6 mhz (slot-based DMA products have a maximum speed of 1.023 mhz). This also means that the DSP can perform DMA to and from ALL 8 megs in a GS regardless of whether or not your RAM card supports DMA. 3. Another benefit of having direct access to the buses is that you can do full VIRTUAL MEMORY on your GS. The card will be capable of 14 megs of virtual memory using dynamically sized swap pages starting at and in any increment of 512 bytes, provided you have the hard disk space. The virtual memory manager will also provide memory protection for multitasking operating systems such as UNIX. Other features include 256k of 1 wait state, 24 bit wide DRAM addressable from both the '816 and DSP. 8k of 0 wait state static RAM mapped as 4k for program and 2k for each of the two data spaces as well as contiguously, the same static RAM configuration found in the NeXT line of workstations. 32k of battery backed-up RAM for driver storage. Built-in 8 bit A/D and D/A converters (37khz maximum sample rate) for digitizing, playback, live manipulation of sound. NeXT compatible DSP port for connection of ANY serial device that operates at less than 2.5 mbps such as digital microphones, CD players, DAT players, scanners, etc. Optional external sound interface box that contains 16 bit, 44.1 khz, stereo Sigma/Delta A/D converters and their D/A counterparts for CD quality sound manipulation, sampling, and playback. An additional option of a phone line interface will be available that will allow people to WRITE 9600 bps V.32 modems, FAX modems (transmit and receive), and voice mail machines in SOFTWARE on the DSP. This box will plug into the NeXT compatible DSP port. High-speed asynchronous Zbus connector allows you to connect other cards to the DSP for ultra high-speed data transfer (up to about 10mbytes/second). As an example, you could connect a graphics card (VGA, etc.) to the Zbus and use the DSP for acceleration of QuickDraw. The DSP would intercept the tool calls, perform the calculations at blinding speed, and blit the data to a graphics card without bothering the GS. Complete developers package that holds back no secrets. This will allow developers to include DSP utilizing features in their code with greatest possible ease. DSP Software Applications... Turning to the software end, there will be a large amount of software included with the board (sample source, object code, utilities -- such as a virtual memory manager, tools, and applications). And included tool patch, InSANE, will accelerate anything that uses the Standard Apple Numerics Environment (SANE) to levels far beyond anything that you could get with a conventional FPU such as a 68881 or 68882. Here are just a couple of other possibilities for adventurous programmers. Thanks to the speed of the DSP, this list only scratches the surface. Disk caching - DMA RAM disks - Tool acceleration - Modems (300-2400, V.32, FAX, ultra high-speed modems - up to 18,000 bits/sec actual transfer rate before data compression) - Real time audio special effects (flanging, phasing, chorus, delay, echo, reverb, harmonizer, EQ, etc.) - Audio manipulation and editing - High-speed data compression - Ultra high-speed data transfers for graphics acceleration, etc. - 8088, 80286, 80386 emulation - Image enhancement - Dolby surround sound decoder - SAP (second audio program) stereo TV sound decoder - Digital filter research: Fast Fourier Transforms, Discrete-Time Fourier Transforms, Radix-2 Decimation-in-Time / Decimation-in-frequency FFT's, Cascadeable Adaptive Finite Impulse Response Filters - Sound and Music Synthesis - Proportional-integral-derivative controllers - and the list goes on and on. Product availability and information The OSRL Apple IIGS/DSP board is expected to be completed by the end of fall '98. Every attempt is being made to make it available for under $300 via special order request only. If you would like more info on the board, please write or call or email. OSRL 115 Santa Clara St. Brisbane, CA 94005-1736 USA Voice: 415-468-1609 Email: cturley@grin.net