Subject: Re: More GS ROM suggestions Path: lobby01.news.aol.com!newstf02.news.aol.com!portc03.blue.aol.com!news-out.internetmci.com!newsfeed.internetmci.com!192.48.96.125!in3.uu.net!munnari.OZ.AU!comp.vuw.ac.nz!news.actrix.gen.nz!dempson From: dempson@actrix.gen.nz (David Empson) Newsgroups: comp.sys.apple2 Date: Sat, 8 Nov 1997 11:48:32 +1300 Organization: Empsoft Lines: 89 Message-ID: <1997110811483297007@dempson.actrix.gen.nz> References: <2042555616-971030014800@rook.wa.com> <345B8DB2.5153@library.ucla.edu> NNTP-Posting-Host: news2.actrix.gen.nz X-Newsreader: MacSOUP 2.2.1 wrote: > Brian Hammack wrote: > > One thing we've overlooked, or I know I have until this moment, is PORT > > SPEED. Get rid of the 19200 limit on the Control Panel's display. Get > > the thing to go faster than 57600 since we now have modems that can > > *do* that clip -- what was ahead of its time in 1987 is now standard in > > 1997 and will be outmod[em]ed before the year 2000. > > I agree. Also agree than in 1987, this chip was one of the best > things going for the GS. It is interesting how they made the > control panel say 19200 max. Another thing that makes the Mac > look better, although I'm not sure this one was deliberate. There are at least two reasons for the 19200 limit in the Control Panel. 1. An unaccelerated Apple IIgs cannot really cope with higher speeds. 2. 19200 is the top speed supported by the standard command set used by the IIgs firmware (emulation of the Super Serial Card command set). This isn't a major problem, as it would just be a matter of supporting speed selection numbers higher than 15. > I'm also wondering there's a 57,600 limit. Appletalk using > the same chips goes much faster. AppleTalk uses the SCC in a different mode (SDLC), and has quite different handling of interrupts to standard asychronous communications. Its speed is 230400 bps, and the CPU has to be completely hogged during packet transmit or receive (up to 24 ms or thereabouts for the longest packets). Asynchronous comms tops out at 57600, unless you disable the Baud Rate Generator and drive the transmitter and receiver directly off the crystal. This would give you 230400 bps, but this is not practical even for an accelerated IIgs, except for a poll-only application. Interrupt handling at this speed wouldn't leave any CPU time for anything else, because asynchronous interrupts are semi-randomly organised in time, according to when data happens to come in. In addition, AppleTalk is half duplex - it only needs to transmit OR receive at 230400. Asynchronous comms would have to cope with both at the same time. You cannot select 115200 or any other speed between 57600 and 230400 without an external clock source. I don't think 115200 would be practical anyway. Even a reasonably fast 680x0 Mac wouldn't be able to handle 115200 or 230400 bps asycnhronous comms using interrupts. The top-end 68K Macs and most PowerMacs have additional hardware which allows the serial port to use DMA to transfer data to and from memory, which significantly lowers the interrupt rate. They have special calls in the serial driver that let software select 115200 or 230400 bps. All other Macs top out at 57600. A DMA serial port would not be very useful in the current IIgs architecture. The system cannot handle a DMA device that generates DMA cycles at semi-random intervals, if there are any other DMA-capable devices (e.g. a SCSI card). There are two reasons for this: 1. The DMA priority chain on the slots is limited to preventing conflicts between adjacent cards. Some cards may not even bother to implement it. 2. There is only one DMA bank register, so all DMA devices have to do DMA to and from the same 64K bank. As this thread is talking about theoretical improvements for the IIgs, both of these problems could be solved in an ideal design, as long as the system software and all DMA drivers were rewritten to cope with multiple DMA bank registers. Better still, give us a new slot architecure that supports a much larger address space for I/O cards (give a 64K bank to each card!), allows a DMA card to specify a 24-bit address directly, and allows cards to be accessed at a higher speed than 1 MHz (probably with a "backward compatibility" mode for old cards). This would probably require a two-part slot connector like in the IBM AT (the current ISA bus). > > The //c came with two monitor ports: RGB and composite. Actually, the IIc doesn't have an RGB port: it has a video output port, which can be connected to an RGB monitor with an appropriate adaptor. -- David Empson dempson@actrix.gen.nz Snail mail: P.O. Box 27-103, Wellington, New Zealand