Subject: Re: New GS accel., how mu
From: Charles Stephens <devnull@dobbs.eng.sun.com>
Date: Thu, Dec 17, 1998 15Ç21 
Message-id: <afkww3q76ku.fsf@dobbs.eng.sun.com>

>>>>> "BH" == Brian Hammack <brian.hammack@rook.wa.com> writes:

 BH>  Rubywand and Charles were speaking:
 >> I am curious.  If there were a new 16MHz GS accelerator availble that
 >> combined the accelerator with memory expansion, how many of you would
 >> buy one and for how much.

 BH> Is that a possibility, having the system RAM on the accellerator?

 BH> I'll agree with Jeff and say that due to various things, keeping it
 BH> simple (leave the system RAM quantity to the user, not the accel card)
 BH> would be a good idea, and lower the price and possible headaches.

 >> 12MB of SRAM (assuming there is some additional OS/Toolbox support > >

 BH> Okay, we know the system's useful limit is 8M, so that extra 4M could
 BH> be used for a RAM disk or System caching.  My feeling is that if that
 BH> extra 4 megs *can't* be used by the System then there's no point
 BH> putting it on.  This would also lower the price a bit.  :)

Memory is cheap.  The memory manager can always be modified to support
four more megs of RAM.

The idea of having the memory on the card is to eliminate the need for
caching which is complicated to implement.  All the card would have to
do is figure out if the address the CPU wants is a) I/O b) ROM c)
shadowed.  It can then assert the ph2 clock as long as needed for the
slow devices to catch up.

 >> 1MB of Flash (for ROM disk and toolbox replacement)

 BH> Good thinking.  Would System 6 have to be reworked to eliminate
 BH> the patching and repatching it does to the ROM Tools in which
 BH> case?

Initially I am thinking that Flash could just copy in the ROM so it
would be faster.  However, it could be a complete ROM disk + firmware
replacement option if someone was bold enough to rewrite the toolbox.

Ideas include:

* HFS booting
* TCP/IP (Atalk/IP) onboard
* SecondSight support and booting.

 >> 16 MHz 65C816

 BH> Or 24 MHz.  :)

Does anyone have a source for 24MHz parts, or even 16MHz?  Why have
all the problems the TWGS had with overclocking if you can avoid it.
Also, again, we want to avoid caching since it will just add
complexity to whole design.

 BH> What I haven't heard mentioned, unless it fell in the category of
 BH> the 12MB SRAM, is the read-ahead caching such as the TWGS has.
 BH> If the TWGS has 8 to 64 kilobytes of cache, your card should have
 BH> 64k to a meg.  :)

Again, 10ns memory is cheap and available, caching can be eliminated.
TWGS had to use caching since it was dependant on there being a memory
expansion card.

Also, one can free up a slot by having everything snug in the ME slot.

As a reference, I have put a block diagram of what I was thinking
about at:

http://www.mathcs.emory.edu/~cfs/gsaccel-fig1.gif

cfs
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