Subject: Re: COP instruction
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From: Charles Stephens <devnull@dobbs.eng.sun.com>
Newsgroups: comp.sys.apple2.programmer
Date: 02 Jul 1999 20:16:08 -0700
Organization: Sun Microsystems, Inc.
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>>>>> "MW" == Mike Westerfield <MikeW50@aol.com> writes:

 MW> ----------
 MW> In article <afkk8snlcqx.fsf@dobbs.eng.sun.com>, Charles Stephens
 MW> <devnull@dobbs.eng.sun.com> wrote:

 >> I have mapped out the algorithms for most of the instructions except
 >> COP.  XGS source seems to treat it like a software trap.  If that is
 >> the case, how do I access the signature the data sheet talks about?

 MW> The COP instruction is a hybrid. In the absence of special
 MW> hardware (which is the case for an emulator) it functions as a
 MW> subroutine call of sorts. You can install COP handlers to
 MW> distinguish between 256 different traps and handle them as you
 MW> like. That's how the ORCA debugger works, for example.

 MW> The COP instruction was actually intended to handle optional
 MW> hardware. The idea is that you would, for example, create a
 MW> floating-point coprocessor that would see and handle COP
 MW> "instructions" via hardware. If the coprocessor is not installed,
 MW> software can handle the instruction. It's a cool idea, but as far
 MW> as I know, no one actually used it this way. I'm not aware of any
 MW> hardware ever created to use the COP instruction.

I am trying to be quite accurate, so I just want to make sure I got it
right.  If a COP is decoded, I should push pc on the stack and set pc
to the vector and it is software's resposibility to skip over the
signature byte and return via a RTI?

It seems that the intension was that if you did have a coprocessor,
you would trap, get the signature oprand and any additional operands
by hand, then perform I/O to the coprocessor device.

It does seem like a good generic software trap.  I disagree with TN105
in that it makes a good purpose software trap.  It would also allow
for good run-time linker support.  Infact, you could combine the
runtime linker and a kernel trap together.

Example, let's say that there is a stdio library called STDIO.  It
could be given a handle 1000 by the OS.  If you wanted to call fread
(the compiler would assign it a routine number), it would go something
like:

Prototype(assume size_t == uint16_t):
	size_t fread(void *ptr, size_t size, size_t nitems, FILE *stream);

	# Push space for the return value
	PHA
	# Push argument list on stack.
	...
	# Call routine
	COP	#00		(Making a Kernel/RTL trap)
	DW	$1000		Library handle
	DW	$0023		Call number for fopen (given by compiler)
	# Application continues, SP is at return value + 2.

If the application doesn't check the return value or casts it to void,
then a simple PLA would take care of the stack.

The additional advantage of using COP is that you don't have to have
fixed entry points in code.  This means the kernel could be relocated
anywhere in memory.  It would also avoid having to slow the system
down to access memory in bank $E0 to get at vectors.

Alternatively, I am adding VM support to my emulator, so I would be
able to map the 65816 kernel out of the memory space of the
application, further proctecting the system from run away programs.

Mike: What signature bytes do you use for your products?  I would like
to avoid conflicts.

Thanks for everyone's help.

cfs
-- 
Charles F. Stephens               = "I don't like the cores,
Software Psychic and Illuminary   =  but the cores like me!"
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